6.6 The MOS Capacitance

Table of Contents - Glossary - Study Aids - Ź Ž

In this Section

Introduction
Simple capacitance model
The flatband capacitance
Exact analysis
Deep depletion capacitance
Experimental results and comparison with theory
Non-Ideal effect in MOS capacitors

Next: 6.7 The exact analytical solution

6.6.1 Introduction

Capacitance voltage measurements of MOS capacitor structure provide a wealth of information about the structure which is of direct interest when one evaluates an MOS process. Since the MOS structure is simple to fabricate the technique is widely used.

To understand capacitance-voltage measurements one must first be familiar with the frequency dependence of the measurement. This frequency dependence occurs primarily in inversion since a certain time is needed to generate the minority carriers in the inversion layer. Thermal equilibrium is therefore not obtained immediately.

The low frequency or quasi-static measurement maintains thermal equilibrium at all times. This capacitance is the difference in charge divided by the difference in gate voltage while the capacitor is in equilibrium at each voltage. A typical measurement is performed with an electrometer which measured the charge added per unit time as one slowly varies the applied gate voltage.

The high frequency capacitance is obtained from a small signal capacitance measurement at high frequency. The gate voltage is varied slowly to obtain the capacitance versus voltage. Under such conditions one finds that the charge in the inversion layer does not change from the equilibrium value corresponding to the applied DC voltage. The high frequency capacitance therefore reflects the charge variation in the depletion layer and the (rather small) movement of the inversion layer charge.

In this section we first derive the simple capacitance model which is based on the full depletion approximations and our basic assumption. The comparison with the exact low frequency capacitance reveals that the largest error occurs at the flatband voltage. We therefore derive the exact flatband capacitance using the linearized Poisson's equation. Then we discuss the full exact analysis followed by a discussion of deep depletion as well as the non-ideal effects in MOS capacitors.

6.6.2 Simple capacitance model

The capacitance of an MOS capacitor is obtained using the same assumptions as in the analysis in section 6.5. The MOS structure is treated as consisting of a series connection of two capacitors: the capacitance of the oxide and the capacitance of the depletion layer.

In accumulation there is no depletion layer. The remaining capacitor is the oxide capacitance, so that the capcitance equals:

In depletion the MOS capacitance is obtained from the series connection of the oxide capacitance and the capacitance of the depletion layer, or:

where x_d is the variable depletion layer width which is calculated from:

In order to find the capacitance corresponding to a specific value of the gate voltage we also need to use the relation between the potential across the depletion region and the gate voltage, given by:

In inversion the capacitance becomes independent of the gate voltage. The low frequency capacitance equals the oxide capacitance since charge is added to and from the inversion layer in a low frequency measurement. The high frequency capacitance is obtained from the series connection of the oxide capacitance and the capacitance of the depletion layer having its maximum width, x_d,max. The capacitances are given by:

The capacitance of an MOS capacitor as calculated using the simple model is shown in the figure below. The dotted lines represent the simple model while the solid line corresponds to the low frequency capacitance as obtained from the exact analysis.

mosexact.xls - moslfcap.gif

Fig. 6.6.1

Low frequency capacitance of an MOS capacitor. Shown are the exact solution for the low frequency capacitance (solid line) and the low and high frequency capacitance obtained with the simple model (dotted lines). The red square indicates the flatband voltage and capacitance, while the green square indicates the threshold voltage and capacitance. N_a = 10¹⁷ cm^-3 and t_ox = 20 nm.

6.6.3 Flat band capacitance

The simple model predicts that the flatband capacitance equals the oxide capacitance. However, the comparison with the exact solution of the low frequency capacitance as shown in the above figure reveals that the error can be substancial. The reason for this is that we have ignored any charge variation in the semiconductor. We will therefore now derive the exact flatband capacitance.

To derive the flatband capacitance including the charge variation in the semiconductor we first linearize Poisson's equation. Since the potential across the semiconductor at flatband is zero, we expect the potential to be small as we vary the gate voltage around the flatband voltage. Poisson's equation can then be simplified to:

The solution to this equation is:

where L_D is called the Debye length. The solution of the potential enables the derivation of the capacitance of the semiconductor under flatband conditions, or:

The flatband capacitance of the MOS structure at flatband is obtained by calculating the series connection of the oxide capacitance and the capacitance of the semiconductor, yielding:

6.6.4 Exact analysis

For a description of the derivation of the MOS capacitance using the exact analysis we refer the reader to that section.

6.6.5 Deep depletion capacitance

Deep depletion occurs in an MOS capacitor when measuring the high-frequency capacitance while sweeping the gate voltage "quickly". Quickly here means that the gate voltage must be changed fast enough so that the structure is not in thermal equilibrium. One then observes that when ramping the voltage from flatband to threshold and beyond the inversion layer is not or only partially formed as the generation of minority carriers can not keep up with the amount needed to form the inversion layer. The depletion layer therefore keeps increasing beyond its maximum thermal equilibrium value, x_d,T resulting in a capacitance which further decreases with voltage.

The time required to reach thermal equilibrium when abruptly biasing the MOS capacitor at a voltage larger then the threshold voltage can be estimated by taking the ratio of the total charge in the inversion layer to the thermal generation rate of minority carriers. A complete analysis should include both a surface generation rate as well as generation in the depletion layer and the quasi-neutral region. A good approximation is obtained by considering only the generation rate in the depletion region x_d,dd. This yields the following equation:

where the generation in the depletion layer was assumed to be constant. The rate of change required to observe deep depletion is then obtained from:

This equation enables to predict that deep depletion is less likely at higher ambient temperature since the intrinsic concentration n_i increases exponentially with temperature, while it is more likely to occur in MOS structures made with wide bandgap materials (for instance SiC for which E_g = 3 eV) as the intrinsic concentration decreases exponentially with the value of the energy bandgap.

In silicon MOS structures one finds that the occurance of deep depletion can be linked to the minority carrier lifetime: while structures with a long (0.1 ms) lifetime require a few seconds to reach thermal equilibrium which results in a pronounced deep depletion effect at room temperature , structures with a short (1 ms) lifetime do not show this effect.

Carrier generation due to light will increase the generation rate beyond the thermal generation rate which we assumed above and reduce the time needed to reach equilibrium. Deep depletion measurements are therefore done in the dark.

6.6.6 Experimental results and comparison with theory

As an example we show below the measured low frequency (quasi-static) and high frequency capacitance-voltage curves of an MOS capacitor. The capacitance was measured in the presence of ambient light as well as in the dark as explained in the figure caption.

cv1.gif

Fig. 6.6.2

Low frequency (quasi-static) and high frequency capacitance of an MOS capacitor. Shown are, from top to bottom, the low frequency capacitance measured in the presence of ambient light (top curve), the low frequency capacitance measured in the dark, the high frequency capacitance measured in the presence of ambient light and the high frequency capacitance measured in the dark (bottom curve). All curves were measured from left to right. The MOS parameters are N_a = 4 x 10¹⁵ cm^-3 and t_ox = 80 nm. The device area is 0.0007 cm²

The figure illustrates some of the issues when measuring the capacitance of an MOS capacitance. First of all one should measure the devices in the dark; the presence of light causes carrier generation in the capacitor which affects the measured capacitance. In addition one must avoid the deep depletion effects such as the initial linearly varying capacitance of the high frequency capacitance measured in the dark on the above figure (bottom curve). The larger the carrier lifetime, the slower the voltage is to be changed to avoid deep depletion.

The low frequency measured is compared to the theorical value in the figure below. The high frequency capacitance measured in the presence of light is also shown on the figure. The figure illustrates the agreement between experiment and theory. A comparison of the experimental low (rather than high) frequency capacitance with theory is somewhat easier to carry out since the theoretical expression is easier to calculate while the low frequency measurement tends to be less sensitive to deep depletion effects.

cv2.gif

Fig. 6.6.3

Comparison of the theoretical low frequency capacitance (solid line) and the experimental data (open squares) obtained in the dark. Also shown is the high frequency measurement in the presence of light of the MOS capacitor (filled squares) and the low and high frequency capacitance obtained with the simple model (dotted lines). Fitting parameters are N_a = 3.95 x 10¹⁵ cm^-3 and t_ox = 80 nm.

6.6.7 Non-Ideal effects in MOS capacitors

Non-ideal effects in MOS capacitors include fixed charge, mobile charge and charge in surface states. All three types of charge can be identified by performing a capacitance-voltage measurement.

Fixed charge in the oxide simply shifts the measured curve. A positive fixed charge at the oxide-semiconductor interface shifts the flatband voltage by an amount which equals the charge divided by the oxide capacitance. The shift reduces linearly as one reduces the position of the charge relative to the gate electrode and becomes zero if the charge is located at the metal-oxide interface. A fixed charge is caused by ions which are incorporated in the oxide during growth or deposition.

The flatband voltage shift due to mobile charge is described by the same equation as that due to fixed charge. However the measured curves differ since a positive gate voltage causes mobile charge to move away from the gate electrode, while a negative voltage attracts the charge towards the gate. This causes the curve to shift towards the applied voltage. One can recognize mobile charge by the hysteresis in the high frequency capacitance curve when sweeping the gate voltage back and forth. Sodium ions incorporated in the oxide of silicon MOS capacitors are known to yield mobile charge. It is because of the high sensitivity of MOS structures to a variety of impurities that the industry carefully controls the purity of the water and the chemicals used.

Charge due to electrons occupying surface states also yields a shift in flatband voltage. However as the applied voltage is varied, the fermi energy at the oxide-semiconductor interface changes also and affects the occupancy of the surface states. The interface states cause the transition in the capacitance measurement to be less abrupt. The combination of the low frequency and high frequency capacitance allows to calculate the surface state density. This method provides the surface state density over a limited (but highly relevant) range of energies within the bandgap. Measurements on n-type and p-type capacitors at different temperatures provide the surface state density throughout the bandgap.

6.5 Ź Ž 6.7

Š Bart J. Van Zeghbroeck, 1996, 1997